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A NAND gate has a true output only if all input events are false; it has a false output event when any input event is true. In other words, if any of the input events occurs, then the output event will not occur. This is logically equivalent to using an AND gate followed by a NOT gate.
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NAND gates are available only in analytical fault trees. There is no equivalent configuration in reliability block diagrams. The inputs to a NOT gate must be fixed probabilities, or evaluate to fixed probabilities; this is checked at analysis, and any input that evaluates to a time-varying model will result in an error.
To configure a NAND gate, only the common block properties are available. No further configuration of the gate is necessary.
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